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| PS/2 MOUSE CONTROLLER PS/2 MOUSE CONTROLLER EM84502 EM84502 GENERAL DESCRIPTION The EM84502 Mouse Controller is specially designed to control PS/2 mouse device.This single chip can interface three key-switches and four photo-couples direct to 8042. EM84502 can receive command and echo status or data format which are compatible with IBM PS/2 mode mouse. Key debouncing circuit is provided to prevent false entry and improve the accuracy. In the conventional mouse, a great number of noises are generated when the grid is partially closed or opened. These noise are usually mistaken for movement signals by conventional mouse controller and the cursor of the dispaly screen is thus moved frequently up and down or back and forth. This will consumes a great amount of energy.The EM84502 PS/2 mouse controller provides noise immunity circuits to eliminate these noise in order to reduce energy consumption. FEATURES * * * * * * * * Being compatiable with PS/2 mouse mode. Built-in noise immunity circuit. Low power dissipation. RC oscillation. Three key-switches and four photo-couples inputs. Both key-press and key-release debounce interval 12 ms. Through three key-switches input, EM84502 can exert seven different output. The motion detector of the EM84502 could sense 8 m/sec maximun with 200 DPI wheels. APPLICATIONS * * * * * Optical mouse or pen-mouse. Mechanical mouse or pen-mouse. Optomechanical mouse or pen-mouse. Mechanical track ball. Optomechanical track ball. PIN ASSIGNMENT EM84502AP VDD OP OSC.OUT CLK DATA VSS R 1 2 3 4 5 6 7 14 13 12 11 10 9 8 OSCR Y2 Y1 X2 X1 L M EM84502AM VDD OP OSC.OUT CLK DATA VSS R 1 2 3 4 5 6 7 14 13 12 11 10 9 8 OSCR Y2 Y1 X2 X1 L M EM84502BP VDD OP NC NC OSC.OUT CLK DATA VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 OSCR Y2 Y1 X2 X1 L M R EM84502BM* VDD OP NC NC OSC.OUT CLK DATA VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 OSCR Y2 Y1 X2 X1 L M R * (Under developed) * This specification are subject to be changed without notice. 6.18.1998 1 EM84502 PS/2 MOUSE CONTROLLER FUNCTIONAL BLOCK DIAGRAM OP X1 X2 Y1 Y2 M O T I O N D E T E C T O R D E B O U N C E I M M U N IT Y N O I S E COUNTER L M R TIMING CONTROLLER D A T A C O N V E R T E R C O M M A N D D E C O D E R OSCR OSC OUT SYSTEM CLOCK GENERATOR DATA I/O DATA CLK PIN DESCRIPTIONS Symbol VDD OP I/O I Function Power X, Y inputs. Floating : Comparator input. GND : Schmitt trigger input. Short to OSC OUT : Testing Mode. Clock output. 8042 auxiliary port CLK line. 8042 auxiliary port DATA line. Ground Three key-switches exert seven different combinations totally. Both key-pressed and key-released signals will be sent accomplanied with horizontal and vertical state. The status of the key-switches will be preserved, whenever the value of horizontal or vertical counters will present at DATA. And the debounce interval for both key-press and key-release is 12 ms. Four photo-couple signals denote UP, DOWN, LEFT, and RIGHT state. During the scaning period, as long as the photo-couples change their states, the value of vertical or horizontal counter will increase or decrease accordingly. 30 Kohm 5% pull low for 35 KHz oscillation. OSCOUT CLK DATA VSS R M L O I/O I/O I X1 X2 Y1 Y2 OSCR I I FUNCTION DESCRIPTIONS A) Operating mode There are four operating modes in PS/2 mouse: i). Reset Mode: In this mode a self-test is initiated during power-on or by a Reset command. After reset signal, PS/2 mouse will send: 1). Completion code AA & ID code 00. * This specification are subject to be changed without notice. 6.18.1998 2 EM84502 PS/2 MOUSE CONTROLLER 2). Set default: sampling rate: 100 reports/s non-autospeed stream mode 2 dot/count disable ii). Stream Mode: The maximum rate of transfer is the programmed sample rate. Data report is transmitted if 1). switch is pressed 2). movement has been detect iii). Remote Mode: Data is transmitted only in response to a Read Data command. iv). Wrap Mode: Any byte of data sent by the system, except hex EC ( Reset wrap mode ) or hex FF ( Reset ), is returned by EM84502. B). PS/2 Mouse Data Report: i). In stream mode: A data report is sent at the end of a sample interval. ii). In remote mode: A data report is sent in response to Read Data command. iii). Data report format: Byte 1 Bit 0 1 2 3 4 5 6 7 0-7 0-7 Description Left button status; 1 = pressed Right button status; 1 = pressed Middle button status; 1 = pressed Reserve X data sign; 1 = negative Y data sign; 1 = negative X data overflow; 1 = overflow Y data overflow; 1 = overflow X data ( D0 - D7 ) Y data ( D0 - D7 ) 2 3 C) PS/2 mouse Data Transmission: i). EM84502 generates the clocking signal when sending data to and receiving data from the system. ii). The system requests EM84502 receive system data output by forcing the DATA line to an inactive level and allowing CLK line to go to an active level. iii). Data transmission frame: * This specification are subject to be changed without notice. 6.18.1998 3 EM84502 PS/2 MOUSE CONTROLLER Bit 1 2-9 10 11 Function Start bit ( always 0 ) Data bits ( D0 - D7 ) Parity bit ( odd parity ) Stop bit ( always 1 ) iv). Data Output ( data from EM84502 to system ): If CLK is low ( inhibit status ) , data is no transmission. If CLK is high and DATA is low ( request-to-send ), data is updated. Data is received from the system and no transmission are started by EM84502 until CLK and DATA both high. If CLK and DATA are both high, the transmission is ready. DATA is valid prior to the falling edge of CLK and beyond the rising edge of CLK. During transmission, EM84502 check for line contention by checking for an inactive level on CLK at intervals not to exceed 100u sec. Contention occurs when the system lowers CLK to inhibit EM84502 output after EM84502 has started a transmission. If this occurs before the rising edge of the tenth clock, EM84502 internal store its data in its buffer and returns DATA and CLK to an active level. If the contention does not occur by the tenth clock, the transmission is complete. Following a transmission, the system inhibits EM84502 by holding CLK low until it can service the input or until the system receives a request to send a response from EM84502. v). Data Input ( from system to EM84502 ): System first check if EM84502 is transmitting data. If EM84502 is transmitting, the system can override the output forcing CLK to an inactive level prior to the tenth clock. If EM84502 transmission is beyond the tenth clock, the system receives the data. If EM84502 is not transmitting or if the system choose to override the output, the system force CLK to an inactive level for a period of not less than 100 sec while preparing for output. When the system is ready to output start bit (0), it allows CLK go to active level. If request-to-send is detected, EM84502 clocks 11 bits. Following the tenth clock EM84502 checks for an active level on the DATA line, and if found, force DATA low , and clock once more. If occurs framing error, EM84502 continue to clock until DATA is high, then clocks the line control bit and request a Resend. When the system sends out a command or data transmission that requires a response, the system waits for EM84502 to response before sending its next output. D). PS/2 Mouse Error Handling: i). A Resend command ( FE ) following receipt of an invalid input or any input with incorrect parity. ii). If two invalid input are received in succession, an error code of hex FC send to the system. iii). The counter accumulators are cleared after receiving any command except "Resend". iv). EM84501 receives a Resend command ( FE ), it transmit its last packet of data. v). In the stream mode "Resend" is received by EM84502 following a 3-byte data packet transmission to the system. EM84502 resend the 3-byte data packet prior to clearing the counter. vi). A response is sent within 25 ms if * This specification are subject to be changed without notice. 6.18.1998 4 EM84502 PS/2 MOUSE CONTROLLER a). The system requires a response b). An error is detected in the transmission vii). When a command requiring a response is issued by the system ,another command should not be issue until either the response is received or 25ms has passed. E). PS/2 Mouse Commands Description: There are 16 valid commands that transmits between the system and EM84502. The "FA" code is always the first response to any valid input received from the system other than a Set Wrap Mode or Resend command. The following table list the commands: Hex Code FF FE F6 F5 F4 F3,XX F2 F0 EE EC EB EA E9 E8,XX E7 E6 Command Reset Resend Set Default Disable Enable Set Sampling Rate Read Device Type Set Remote Mode Set Wrap Mode Reset Wrap Mode Read Data Set Stream Mode Status Request Set Resolution Set Autospeed Reset Autospeed EM84502 echo code FA,AA,00 XX,(XX,XX) FA FA FA FA,FA FA,00 FA FA FA FA,XX,XX,XX FA FA,XX,XX,XX FA,FA FA FA The following describes valid commands: a). Reset ( FF ) EM84502 operation: i). Completion the reset. ii). Transmitted FA,AA,00 to the system. iii). Set default: sampling rate: 100 reports/s non-autospeed stream mode 2 dots/count disable b). Resend ( FE ) i). Any time EM84502 receives an invalid command, it returns a Resend command to the system. ii). When EM84502 receives a Resend command, it retransmits its last packet of data. If the last packet was a Resend command, it transmits the packet just prior to the Resend command. iii). In stream mode, if a Resend command is received by EM84502 immediately following a 3-byte data packet transmission to the system. * This specification are subject to be changed without notice. 6.18.1998 5 EM84502 PS/2 MOUSE CONTROLLER c). Set Default ( F6 ) The command reinitializes all conditions to the power-on defaults. d). Disable ( F5 ) This command is used in the stream mode to stop transmissions from EM84502. e). Enable ( F4 ) Begins transmissions, if in stream mode. f). Set Sampling Rate ( F3,XX ) In the stream mode, this command sets the sampling rate to the value indicated by byte hex XX, shown in following: Second byte XX 0A 14 28 3C 50 64 C8 Sample Rate 10/sec 20/sec 40/sec 60/sec 80/sec 100/sec 200/sec g). Read Device Type ( F2 ) EM84502 always echoes " FA,00 " following this command. h). Set Remote Mode ( F0 ) Data value are reported only in response to a Read Data command. i). Set Wrap Mode ( EE ) Wrap mode remains until Reset ( FF ) or Reset Wrap Mode( EC ) is received. j). Reset Wrap Mode ( EC ) EM84502 returns to the previous mode of operation after receiving this command. k). Read Data ( EB ) This command is executed in either remote or stream mode. The data is transmitted even if there has been no movement since the last report or the button status is unchanged. Following a Read Data command, the registers are cleared after a data transmission. l). Set Stream Mode ( EA ) This command sets EM84502 in stream mode. m). Status Request ( E9 ) When this command is issued by the system, EM84502 respond with a 3-byte status report as follows: Byte 1 Bit 0 1 2 Description 1 = Right button pressed 1 = Middle button pressed 1 = Left button pressed 6.18.1998 6 * This specification are subject to be changed without notice. EM84502 PS/2 MOUSE CONTROLLER 2 3 3 4 5 6 7 0-7 0-7 Reserved 0 = Normal speed, 1 = Autospeed 0 = Disabled, 1 = Enabled 0 = Stream mode, 1 = Remote mode Reserved Current resolution setting ( D0 - D7 ) Current sampling rate ( D0 - D7 ) n). Set Resolution ( E8,XX ) EM84502 provides four resolutions selected by the second byte of this command as follows: Second Byte XX 00 01 02 03 Resolution 8 dot/count 4 dot/count 2 dot/count 1 dot/count o). Set Autospeed ( E7 ) At the end of a sample interval in the stream mode, the current X and Y data values are converted new values. The sign bits are not involved in this conversion. The conversion is only in stream mode. The relationship between the input and output count follows: Input 0 1 2 3 4 5 N(6 ) p). Reset Autospeed ( E6 ) This command restore normal speed. F) Testing mode Whenever OPT is connected to OSC OUT, the chip will enter buyer's testing mode. The X direction output signals of comparators will present to L and M pin. Pressing "R" key can toggle the output from X direction to Y direction. Ouput 0 1 1 3 6 9 2.0*N ABSOLUTE MAXIMUM RATINGS Parameter Temperature under bias Storage temperature range Input voltage Output voltage Sym. TOPR TSTR VIN VO Ratings 0~70 -65~150 -0.3~6.0 -0.3~6.0 Unit C C V V 6.18.1998 7 * This specification are subject to be changed without notice. EM84502 PS/2 MOUSE CONTROLLER DC ELECTRICAL CHARACTERISTICS (TA=25C to 70C) Parameters Operating voltage Operating current (no load) X,X2,Y1,Y2 low input reference current X,X2,Y1,Y2 high input reference current X,X2,Y1,Y2 input current Schmitt trigger input (76A) X,X2,Y1,Y2 input current Comparator input (80A) X,X2,Y1,Y2 input current Comparator input (500A) CLK, DATA postive-going threshold voltage CLK, DATA negative-going threshold voltage Low input voltage, other pins High input voltage, other pins L, M, R input current (pull low resistor Vin=5V) PS/2 mouse mode DATA, CLK input Current (pull up resistor) (VIN=0V) PS/2 mouse mode DATA, CLK low output voltage (Iprl=-2mA) L, M, R, X1, X2, Y1, Y2 input leakage current (Vin=0V) Sym. VDD IOp IPL IPh VPI VPI VPI Vt+ Vt Vail Vaih Imi Idc Vprl Iil Min. 4.5 70 0.8 0.8 1.5 3.2 1.2 3.5 16.6 0.56 0 Typ. 5 - Max. 5.5 1.2 106 1.2 1.2 2.1 3.8 1.9 1.5 50 1.86 0.4 1.0 Unit V mA A A V V V V V V V A mA V A * All voltages in above table are compared with VSS. * All parameters in above table are tested under VDD=5V. * CLK & DATA output gates are open drains that connect to pull up resistors. * X1, X2,Y1,T2 Input Impedance MAX. TYP. MIN. 16.0K 15.0K 14.0K 13.0K 12.0K 11.0K 10.0.K 9.0K 8.0K 7.0K 6.0K 5.0K 4.0K 3.0K 2.0K 1.0K 0 10.0M 1.0 2.0 VOLTS (LIN) 3.0 4.0 5.0 * This specification are subject to be changed without notice. 6.18.1998 8 EM84502 PS/2 MOUSE CONTROLLER AC ELECTRICAL CHARACTERISTICS (TA=0C to 70C) Parameters Oscillating Frequency Key Debounce Rising Edge Crossed Width Fosc=35 KHz Falling Edge Crossed Width Fosc=35 KHz Mouse CLK Active Time Mouse CLK Inactive Time Mouse Sample DATA from CLK rising Edge System CLK Active Time System CLK Inactive Time Time from DATA Transition to Falling Edge of CLK Time from rising Edge of CLK to DATA Transition Time to mouse Inhibit after the 11th CLK to ensure mouse does not start another Transmission Sym. Fosc Tkd Tr Tf Tmca Tmci Tmdc Tsca Tsci Tsdc Tscd Tpi Min. 34.3-10% 14.3 14.3 0 Typ. 34.3 12 42.9 42.9 14.3 42.9 42.9 14.3 28.6 - Max. 34.3+10% 50 Unit KHz ms us us us us us us us us us us PS. The AC timings are measured under using 35 KHz system clock signal. TIMING DIAGRAM (1) Photo-couples pulse width : X1 (Y1) X2 (Y2) Tr (2) PS/2 Mouse (A) Receiving DATA Inhibit CLK 1st CLK 2nd CLK 9th CLK 10th CLK 11th CLK ***** Tf > > DATA Start Bit < Tmca > Tmci < < Tmdc ********* Bit0 -Bit7 *** ***** Parity Bit Stop Bit Line Control Bit ** * This specification are subject to be changed without notice. 6.18.1998 9 EM84502 PS/2 MOUSE CONTROLLER (B) Sending DATA 1st CLK CLK 2nd CLK 10th CLK 11th CLK *********** > > DATA Start Bit < < Tsci > < Tsca < > Tpi < > Tsdc Tscd ********* Bit0 -Bit7 *** ***** Parity Bit Stop Bit ********* AC Timing point: Output: DATA, CLK PIN (PS/2 mouse mode) Input: X1,X2,Y1,Y2 PIN CLK, DATA PIN L,M,R PIN V -2.6 DD V SS +0.4 48.4 A +1.6V 39.6 VSS A V -0.8 DD V SS +0.8 VDD V SS EM84502 I/O pin equivalent circuit : R,M,L : DATA : VCC (R,M,L) (R,M,L) INTERNAL SIGNAL PS2 MOUSE ENABLE DATA OUTPUT SIGNAL VCC DATA DATA INPUT SIGNAL CLK : X1,X2,Y1,Y2 : X1,X2,Y1,Y2 VCC PHASE DIGITAL SIGNAL + VCC 13.2K 12.5K PS2 MOUSE ENABLE CLK CLK OUTPUT SIGNAL VDD 4 VDD VDD + 80A CLK INPUT SIGNAL 30K 13.2K 12.5K * This specification are subject to be changed without notice. 6.18.1998 10 EM84502 PS/2 MOUSE CONTROLLER APPLICATION CIRCUIT +5V 10f PS/2 MOUSE ONLY 13 12 11 DD 1 EM84501 V 10 9 8 Y2 Y1 X2 X1 L OSC.DR OSC.OUT EM84502A DATA CLK M 2 3 5 14 30K 4 * This specification are subject to be changed without notice. DATA CLK GROUND 6 V SS OP R 7 510 510 6.18.1998 11 EM84502 PS/2 MOUSE CONTROLLER 14 PDIP E1 1 F 15(2X) E1 D C A1 5(2X) 15(4X) B B1 eB e L1 A L Symbol A A1 B B1 C D E1 F L L1 e eB MIN. .059 .740 .259 .290 .345 0 Inches TYP. .130 .060 .018 .060 .010 .750 .260 .300 .130 .020 .100 .355 7.5 MAX. .061 .760 .310 .365 15 MIN. 1.499 18.796 6.579 7.366 8.763 0 Milimeters TYP. 3.302 1.524 0.457 1.524 0.254 19.050 6.604 7.620 3.302 0.506 2.540 9.017 7.5 MAX. 1.549 19304 7.874 9.271 15 * This specification are subject to be changed without notice. 6.18.1998 12 |
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